Please use this identifier to cite or link to this item:
https://open.uns.ac.rs/handle/123456789/14487
Title: | Ultralow-latency hardware-in-the-loop platform for rapid validation of power electronics designs | Authors: | Majstorovic D. Celanovic I. Teslic N. Celanovic N. Katić, Vladimir |
Issue Date: | 1-Oct-2011 | Journal: | IEEE Transactions on Industrial Electronics | Abstract: | This paper introduces a unified approach to the validation of power-electronics (PE) control hardware, firmware, and software designs. It is based on a scalable application-specific ultralow-latency (ULL) digital processor core. The proposed ULL processor core simulates PE converters and systems comprising multiple power converters with a fixed 1-μs simulation time step and latency, regardless of the size of the system. Owing to its ULL, the proposed platform enables the fully automatic testing and validation of the complete PE design comprising component safe-operating-area validation, system protection, firmware, and software implementation as well as overall system performance optimization. © 2011 IEEE. | URI: | https://open.uns.ac.rs/handle/123456789/14487 | ISSN: | 2780046 | DOI: | 10.1109/TIE.2011.2112318 |
Appears in Collections: | FTN Publikacije/Publications |
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