Please use this identifier to cite or link to this item: https://open.uns.ac.rs/handle/123456789/14487
DC FieldValueLanguage
dc.contributor.authorMajstorovic D.en
dc.contributor.authorCelanovic I.en
dc.contributor.authorTeslic N.en
dc.contributor.authorCelanovic N.en
dc.contributor.authorKatić, Vladimiren
dc.date.accessioned2020-03-03T14:56:20Z-
dc.date.available2020-03-03T14:56:20Z-
dc.date.issued2011-10-01en
dc.identifier.issn2780046en
dc.identifier.urihttps://open.uns.ac.rs/handle/123456789/14487-
dc.description.abstractThis paper introduces a unified approach to the validation of power-electronics (PE) control hardware, firmware, and software designs. It is based on a scalable application-specific ultralow-latency (ULL) digital processor core. The proposed ULL processor core simulates PE converters and systems comprising multiple power converters with a fixed 1-μs simulation time step and latency, regardless of the size of the system. Owing to its ULL, the proposed platform enables the fully automatic testing and validation of the complete PE design comprising component safe-operating-area validation, system protection, firmware, and software implementation as well as overall system performance optimization. © 2011 IEEE.en
dc.relation.ispartofIEEE Transactions on Industrial Electronicsen
dc.titleUltralow-latency hardware-in-the-loop platform for rapid validation of power electronics designsen
dc.typeJournal/Magazine Articleen
dc.identifier.doi10.1109/TIE.2011.2112318en
dc.identifier.scopus2-s2.0-80052344994en
dc.identifier.urlhttps://api.elsevier.com/content/abstract/scopus_id/80052344994en
dc.relation.lastpage4716en
dc.relation.firstpage4708en
dc.relation.issue10en
dc.relation.volume58en
item.fulltextNo Fulltext-
item.grantfulltextnone-
Appears in Collections:FTN Publikacije/Publications
Show simple item record

SCOPUSTM   
Citations

111
checked on Nov 20, 2023

Page view(s)

37
Last Week
9
Last month
0
checked on May 10, 2024

Google ScholarTM

Check

Altmetric


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.