A 130 Nm Operational Amplifier: Design and Schematic Level Simulation

Abstract

© 2015 IEEE. In this paper an operational amplifier of general purpose is presented. The unified current-control model is used to synthesize a standard, two-stage topology based circuit. The design procedure is discussed thoroughly and every step is explained in details. The results obtained include open loop gain of 74 dB, the gain-bandwidth product of 100 MHz and the phase margin higher than 46°. Supply voltage and temperature coefficients are analyzed and discussed within the paper. Process variations are investigated through corner analysis. The results presented are obtained through schematic level simulations using the Spectre Simulator from Cadence Design System and a standard 130 nm CMOS technology process.