Computer based emulation of power electronics hardware

Abstract

This paper defines a highly optimized computer architecture and FPGA technology as the most feasible approach to satisfy the challenging requirements defined by the need to emulate power electronics hardware with sub-microsecond latency and sampling time. The proposed commercial of the shelf computational platforms and the accompanying software tools based on the industry standard software platform have the potential to bring qualitative improvements in the way how power electronics software is designed, how it is tested and how its performance is verified. © 2009 IEEE.