Real-time wavelet domain video denoising implemented in FPGA

Abstract

In this paper we develop an advanced spatio-temporal wavelet domain filtering algorithm which is suitable for hardware implementation, we implement it in the Field Programmable Gate Arrays (FPGA) and report the results of real-time processing. The wavelet decomposition in our implementation is non-decimated with three decomposition levels and with a Daubechies' minimum phase orthogonal wavelet. Noise reduction is implemented with spatially adaptive Bayesian wavelet shrinkage. In the next filtering stage, a motion detector controls selective, recursive averaging of pixel intensities over time. The algorithm is customized for the hardware implementation and is realized in FPGA. The standard composite television video stream is digitalized and used as source for real-time video sequences. The results demonstrate the effectiveness of the developed scheme for real time video processing.