A compact 3.1-5 GHz RC feedback low-noise amplifier employing a gain enhancement technique

Abstract

© MIDEM Society. A low-noise amplifier (LNA) with main cascode amplifying stage utilizing a current-reuse transconductance-boosting technique is presented in this paper. This topology increases the effective transconductance, gm, of the input transistor and prevents a large voltage drop across the load resistor, thus reducing power consumption. The feedback topology made of source follower connected in series with a parallel RC network improves input impedance matching at high frequencies, while a gate peaking inductor inside the feedback loop enhances the amplifier bandwidth. The proposed LNA is implemented in UMC 0.18 μm CMOS technology for a lower band of the ultra-wideband spectrum from 3.1 to 5 GHz. Measurements show a power gain (S21) of 9.7±0.45 dB with the 3-dB band from 1.1 to 5.57 GHz. The input return loss (S11) is below -10 dB from 1 to 5 GHz, while the output return loss (S22) is less than -10 dB and the reverse isolation (S12) is better than -25.5 dB across the whole measured bandwidth, 1-7 GHz. The input-referred 1-dB compression point (P1dB) is -10.5 dBm at 3 GHz. The average noise figure (NF) obtained by post-layout simulations is 4.24 dB, with a minimum value of 4.05 dB at 4.92 GHz. By using only one inductor in the proposed design, the total chip area is greatly reduced to 0.913 mm2. The LNA core area occupies 0.353 mm2and consumes 9.97 mW from a 1.8 V supply.