Please use this identifier to cite or link to this item: https://open.uns.ac.rs/handle/123456789/2342
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dc.contributor.authorStruharik, Rastislaven
dc.contributor.authorVukobratovic B.en
dc.date.accessioned2019-09-23T10:21:02Z-
dc.date.available2019-09-23T10:21:02Z-
dc.date.issued2017-11-14en
dc.identifier.isbn9781538632994en
dc.identifier.urihttps://open.uns.ac.rs/handle/123456789/2342-
dc.description.abstract© 2017 IEEE. In this paper we propose a novel CNN hardware accelerator, called AlScale, capable of accelerating convolutional, pooling, fully-connected and adding CNN layers. In contrast to most existing solutions, AIScale offers a complete solution to the full CNN acceleration. AIScale is designed as a coarse-grained reconfigurable architecture, which uses rapid, dynamic reconfiguration during the CNN layer processing. Furthermore, a novel algorithm for mapping computations to the available computing resources enables AIScale to achieve higher utilization ratios than some of the previously proposed solutions. Results of the experiments indicate that the AIScale architecture is 1.16 to 2.73 times faster and consumes from 25% to 45% less energy on DRAM data transfers than the previously proposed MIT's Eyeriss CNN accelerator while using an identical number of computing units and having almost identical on-chip RAM memory size.en
dc.relation.ispartofProceedings of 2017 IEEE East-West Design and Test Symposium, EWDTS 2017en
dc.titleAIScale - A coarse grained reconfigurable CNN hardware acceleratoren
dc.typeConference Paperen
dc.identifier.doi10.1109/EWDTS.2017.8110048en
dc.identifier.scopus2-s2.0-85040528372en
dc.identifier.urlhttps://api.elsevier.com/content/abstract/scopus_id/85040528372en
item.grantfulltextnone-
item.fulltextNo Fulltext-
crisitem.author.deptFakultet tehničkih nauka, Departman za energetiku, elektroniku i telekomunikacije-
crisitem.author.parentorgFakultet tehničkih nauka-
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