Implementation aspects for successive interference cancellation in DS/CDMA systems

Abstract

This paper addresses the practical implementation of Successive Interference Cancellation (SIC) for DS/CDMA systems. The practical aspects of such an implementation are discussed and a convenient pipelined architecture is presented. An important aspect is the integration of power control (PC) and interference cancellation which has synergistic effects of optimizing the SIC, reducing intercell interference, and facilitating the implementation.