Please use this identifier to cite or link to this item: https://open.uns.ac.rs/handle/123456789/1382
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dc.contributor.authorPajkanovic A.en
dc.contributor.authorStojanović, Goranen
dc.date.accessioned2019-09-23T10:15:19Z-
dc.date.available2019-09-23T10:15:19Z-
dc.date.issued2018-08-13en
dc.identifier.isbn9781538651520en
dc.identifier.urihttps://open.uns.ac.rs/handle/123456789/1382-
dc.description.abstract© 2018 IEEE. In this paper, an inductor of meander topology is designed using Cadence integrated circuit toolchain. The structure is fabricated using a 130 nm standard CMOS technology node. Characterization is performed at frequencies up to 35 GHz and at temperatures of 20°C, 50°C and 80°C. For the experiment an RF probe station with a temperature controllable chuck has been used. The results this set-up yielded include inductance, Q-factor and parasitic resistance behavior versus temperature. Meander topology temperature performance is presented and discussed.en
dc.relation.ispartofSMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Designen
dc.titleTemperature Performance of Meander-Type Inductor in Silicon Technologyen
dc.typeConference Paperen
dc.identifier.doi10.1109/SMACD.2018.8434918en
dc.identifier.scopus2-s2.0-85052529668en
dc.identifier.urlhttps://api.elsevier.com/content/abstract/scopus_id/85052529668en
dc.relation.lastpage196en
dc.relation.firstpage193en
item.fulltextNo Fulltext-
item.grantfulltextnone-
crisitem.author.deptDepartman za energetiku, elektroniku i telekomunikacije-
crisitem.author.orcid0000-0003-2098-189X-
crisitem.author.parentorgFakultet tehničkih nauka-
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