Please use this identifier to cite or link to this item:
https://open.uns.ac.rs/handle/123456789/1382
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Pajkanovic A. | en |
dc.contributor.author | Stojanović, Goran | en |
dc.date.accessioned | 2019-09-23T10:15:19Z | - |
dc.date.available | 2019-09-23T10:15:19Z | - |
dc.date.issued | 2018-08-13 | en |
dc.identifier.isbn | 9781538651520 | en |
dc.identifier.uri | https://open.uns.ac.rs/handle/123456789/1382 | - |
dc.description.abstract | © 2018 IEEE. In this paper, an inductor of meander topology is designed using Cadence integrated circuit toolchain. The structure is fabricated using a 130 nm standard CMOS technology node. Characterization is performed at frequencies up to 35 GHz and at temperatures of 20°C, 50°C and 80°C. For the experiment an RF probe station with a temperature controllable chuck has been used. The results this set-up yielded include inductance, Q-factor and parasitic resistance behavior versus temperature. Meander topology temperature performance is presented and discussed. | en |
dc.relation.ispartof | SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design | en |
dc.title | Temperature Performance of Meander-Type Inductor in Silicon Technology | en |
dc.type | Conference Paper | en |
dc.identifier.doi | 10.1109/SMACD.2018.8434918 | en |
dc.identifier.scopus | 2-s2.0-85052529668 | en |
dc.identifier.url | https://api.elsevier.com/content/abstract/scopus_id/85052529668 | en |
dc.relation.lastpage | 196 | en |
dc.relation.firstpage | 193 | en |
item.fulltext | No Fulltext | - |
item.grantfulltext | none | - |
crisitem.author.dept | Departman za energetiku, elektroniku i telekomunikacije | - |
crisitem.author.orcid | 0000-0003-2098-189X | - |
crisitem.author.parentorg | Fakultet tehničkih nauka | - |
Appears in Collections: | FTN Publikacije/Publications |
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