Please use this identifier to cite or link to this item: https://open.uns.ac.rs/handle/123456789/4896
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dc.contributor.authorMijić, Kristinaen
dc.contributor.authorMezei, Ivanen
dc.contributor.authorStruharik, Rastislaven
dc.date.accessioned2019-09-30T08:43:11Z-
dc.date.available2019-09-30T08:43:11Z-
dc.date.issued2016-01-08en
dc.identifier.isbn9781509000548en
dc.identifier.urihttps://open.uns.ac.rs/handle/123456789/4896-
dc.description.abstract© 2015 IEEE. IP cores for direct and inverse discrete cosine transformation are important part of compression core implementation. In this paper the results for the implementation of two dimensional binary discrete cosine transformation (2D binDCT) and two dimensional binary discrete cosine inverse transformation (2D binIDCT) algorithm which are discrete cosine transformation/ discrete cosine inverse transformation (DCT/IDCT) approximations are presented. Besides, binDCT and binlDCT algorithm acceleration gain compared to the software implementation is given. It is shown that hardware implementation is 3 to 100 times faster compared to software implementation.en
dc.relation.ispartof2015 23rd Telecommunications Forum, TELFOR 2015en
dc.titleIP cores for 2D direct and inverse discrete cosine transformationen
dc.typeConference Paperen
dc.identifier.doi10.1109/TELFOR.2015.7377500en
dc.identifier.scopus2-s2.0-84964411789en
dc.identifier.urlhttps://api.elsevier.com/content/abstract/scopus_id/84964411789en
dc.relation.lastpage436en
dc.relation.firstpage433en
item.fulltextNo Fulltext-
item.grantfulltextnone-
crisitem.author.deptEkonomski fakultet, Departman za finansije i računovodstvo-
crisitem.author.deptFakultet tehničkih nauka, Departman za energetiku, elektroniku i telekomunikacije-
crisitem.author.deptFakultet tehničkih nauka, Departman za energetiku, elektroniku i telekomunikacije-
crisitem.author.parentorgEkonomski fakultet-
crisitem.author.parentorgFakultet tehničkih nauka-
crisitem.author.parentorgFakultet tehničkih nauka-
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