Please use this identifier to cite or link to this item: https://open.uns.ac.rs/handle/123456789/15550
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dc.contributor.authorMileusnic S.en
dc.contributor.authorZivanov M.en
dc.contributor.authorHabas P.en
dc.date.accessioned2020-03-03T15:00:25Z-
dc.date.available2020-03-03T15:00:25Z-
dc.date.issued2001-01-01en
dc.identifier.urihttps://open.uns.ac.rs/handle/123456789/15550-
dc.description.abstractCharge stored in the transistor cause capacitive effects that influence transient behavior of MOSFET. C-V measurement is a fundamental technique for MOSFET characterization. Split C-V measurements are evaluated as a characterization method for MOS transistors. In these measurements, as opposed to total gate capacitance, gate-drain and gate source capacitance are given and, thus, the electron and hole contributions of particular interface areas are separated. In this paper are shown split C-V measurement results of MOS transistors made in different technologies. The idea was to show that this method is widely applicable. Interpretation of experimental results is confirmed by numerical 2D calculations of the split C-V characteristics in device simulator MINIMOS6 by means of small signal ac analysis and by numerical quasi-static analysis. It is also shown the influence of irradiation on split C-V characteristics and annealing process after radiation. Some practical aspects of this method is presented, especially for device parameter extraction.en
dc.relation.ispartofProceedings of the International Semiconductor Conference, CASen
dc.titleMOS transistors characterization by split C-V methoden
dc.typeConference Paperen
dc.identifier.scopus2-s2.0-0035744134en
dc.identifier.urlhttps://api.elsevier.com/content/abstract/scopus_id/0035744134en
dc.relation.lastpage506en
dc.relation.firstpage503en
dc.relation.volume2en
item.grantfulltextnone-
item.fulltextNo Fulltext-
Appears in Collections:Naučne i umetničke publikacije
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