Please use this identifier to cite or link to this item: https://open.uns.ac.rs/handle/123456789/15250
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dc.contributor.authorMišić M.en
dc.contributor.authorJevtić, Marijaen
dc.date.accessioned2020-03-03T14:59:12Z-
dc.date.available2020-03-03T14:59:12Z-
dc.date.issued2006-12-01en
dc.identifier.isbn1424401178en
dc.identifier.urihttps://open.uns.ac.rs/handle/123456789/15250-
dc.description.abstractIn this paper theoretical study of a dual-gate MOSFET (DGMOSFET) 1/f noise and its sensitivity to variation of transistor geometry and technology parameters is presented. Expression for 1/f current noise spectral density Sid(f) is obtained using an ac current approach in a DGMOSFET LF small-signal noise equivalent circuit. The results show 1/f Sid(f) level increase with L1 increase and W decrease. For a single MOS transistor and L increase opposite 1/f noise behaviour is observed. In case of a DGMOSFET, not only transistors noise sources influence overall noise but also dynamic transistors parameters and load resistance RL. Sensitivity of S id(f) to source/drain junction depth xj is minimal as a consequence of " long channel" DGMOSFET structure. As for oxide thickness, 1/f noise level show expected increase with tox increase. © 2006 IEEE.en
dc.relation.ispartof2006 25th International Conference on Microelectronics, MIEL 2006 - Proceedingsen
dc.titleDependence of DGMOSFET 1/f noise on transistor geometry and technology parametersen
dc.typeConference Paperen
dc.identifier.doi10.1109/ICMEL.2006.1651021en
dc.identifier.scopus2-s2.0-77956543346en
dc.identifier.urlhttps://api.elsevier.com/content/abstract/scopus_id/77956543346en
dc.relation.lastpage576en
dc.relation.firstpage573en
item.fulltextNo Fulltext-
item.grantfulltextnone-
crisitem.author.deptMedicinski fakultet, Katedra za higijenu-
crisitem.author.orcid0000-0002-1194-0765 -
crisitem.author.parentorgMedicinski fakultet-
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